Acceleration of input/output (I/O) communication through improved address translation
US6976148B2 · kind B2 · utility
22Cited by
3References
23Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 9, 2003 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Jul 26, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An I/O communication adapter receives from a processor core an I/O command referencing an effective address within an effective address space of the processor core that identifies a storage location. In response to receipt of the I/O command, the I/O communication adapter translates the effective address into a real address by reference to a translation data structure. The I/O communication adapter then accesses the storage location utilizing the real address to perform an I/O data transfer specified by the I/O command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.