Structure and method to improve channel mobility by gate electrode stress modification
US6977194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2003 |
| Grant date | Dec 20, 2005 |
| Priority date | — |
| Expiry date | Oct 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
In producing complementary sets of metal-oxide-semiconductor (CMOS) field effect transistors, including nFET and pFET), carrier mobility is enhanced or otherwise regulated through the reacting the material of the gate electrode with a metal to produce a stressed alloy (preferably CoSi2, NiSi, or PdSi) within a transistor gate. In the case of both the nFET and pFET, the inherent stress of the respective alloy results in an opposite stress on the channel of respective transistor. By maintaining opposite stresses in the nFET and pFET alloys or silicides, both types of transistors on a single chip or substrate can achieve an enhanced carrier mobility, thereby improving the performance of CMOS devices and integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.