Spacer integration scheme in MRAM technology

US6985384B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Gregory Costrini · Hopewell Junction, US
• John P. Hummel · Millbrook, US
• Kia-Seng Low · Hopewell Junction, US
• Igor Kasko · Mennecy, FR
• Frank Findeis · Munich, DE
• Wolfgang Raberg · Sauerlach, DE

Key dates

• Filing date: Oct 1, 2002
• Grant date: Jan 10, 2006
• Expiry date: Nov 7, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/01

Abstract

A magneto resistive memory device is fabricated by etching a blanket metal stack comprised of a buffer layer, pinned magnetic layer, a tunnel barrier layer and a free magnetic layer. The problem of junction shorting from resputtered metal during the etching process is eliminated by formation of a protective spacer covering the side of the freelayer and tunnel barrier interface. The spacer is formed following the first etch through the free layer which stops on the barrier layer. After spacer formation a second etch is made to isolate the device. The patterning of the device tunnel junction is made using a disposable mandrel method that enables a self-aligned contact to be made following the completion of the device patterning process.