Method for fabricating a transistor configuration including trench transistor cells having a field electrode, trench transistor, and trench configuration

US7005351B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Ralf Henninger · Birkenfeld, DE
• Franz Hirler · Isen, DE
• Joachim Krumrey · Eisenlohrsweg, AT
• Walter Rieger · Arnoldstein, AT
• Martin Pölzl · Ossiach, AT
• Heimo Hofer · Bodensdorf, AT

Key dates

• Filing date: Mar 19, 2003
• Grant date: Feb 28, 2006
• Expiry date: Dec 28, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode. The trenches are formed in a semiconductor substrate. A drift zone, a channel zone, and a source zone are in each case provided in the semiconductor substrate. According to the invention, the source zone and/or the channel zone are formed at the earliest after the introduction of the trenches into the semiconductor substrate by implantation and diffusion.