Method of manufacturing different bond pads on the same substrate of an integrated circuit package
US7005370B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2004 |
| Grant date | Feb 28, 2006 |
| Priority date | — |
| Expiry date | May 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is formed over the substrate. A second metallurgy layer is formed over the first metallurgy layer. The first metallurgy layer is removed while leaving a portion thereof over the second contact pad. The second metallurgy layer is removed while leaving a portion thereof over the second contact pad. A protective layer is formed over the first contact pad while removing the first metallurgy layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.