Damascene process for a T-shaped gate electrode
US7008832B1 · kind B1 · utility
18Cited by
39References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2001 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Jul 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A damascene process can be utilized to form a T-shaped gate. A silicon rich nitride or SiON layer can be etched to form a first aperture. An oxide layer can be provided above the silicon rich nitride layer or SiON layer. A second aperture or trench can be provided in the oxide layer. The second trench can have a larger width than the trench in the silicon rich nitride layer or SiON layer. A gate conductor material, such as polysilicon, can be provided in the first trench and/or the second trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.