Error indication in a raid memory system
US7028213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Aug 7, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.