Method for fabricating a self-aligned nanocolumnar airbridge and structure produced thereby
US7030495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2004 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Sep 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a low k, ultra-low k, and extreme-low k multilayer interconnect structure on a substrate in which the interconnect line features are separated laterally by a dielectric with vertically oriented nano-scale voids formed by perforating it using sub-optical lithography patterning and etching techniques and closing off the tops of the perforations by a dielectric deposition step. The lines are supported either by solid or patterned dielectric features underneath. The method avoids the issues associated with the formation of air gaps after the fabrication of conductor patterns and those associated with the integration of conventional low k, ultra-low k and extreme low k dielectrics which have porosity present before the formation of the interconnect patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.