Strained silicon semiconductor on insulator MOSFET

US7033869B1 · kind B1 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Qi Xiang · San Jose, US
• Jung-Suk Goo · Stanford, US
• James Pan · Fishkill, US

Key dates

• Filing date: Jan 13, 2004
• Grant date: Apr 25, 2006
• Expiry date: Jul 24, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6748

Abstract

An SOI substrate comprises a layer of strained silicon sandwiched between a dielectric layer and a layer of strained silicon. The substrate may be used to form a strained silicon SOI MOSFET having a gate electrode that extends through the silicon germanium layer to a channel region formed in the strained silicon layer. The MOSFET may be formed in a fully depleted state by using a strained silicon layer of appropriate thickness.