Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US7042772B2 · kind B2 · utility
13Cited by
96References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2004 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Oct 26, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a memory cell is disclosed. The memory cell comprises a select transistor and a data storage element. The method comprises allowing current to flow through the data storage element until a predetermined current or voltage is detected. If the current or voltage exceeds a threshold, then the programming is deemed complete.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.