Semiconductor integrated circuit device
US7045864B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 14, 2002 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Feb 11, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
A semiconductor integrated circuit device, e.g., a memory cell of an SRAM, is formed of a pair of inverters having their input and output points connected in a crisscross manner and being formed of drive n-channel MISFETs and load p-channel MISFETs. The n-channel MISFETs and p-channel MISFETs have their back gates supplied with power supply voltage and a ground voltage, respectively. The MISFETs are formed with a metal silicide layer on the gate electrodes G and source regions (hatched areas) and without the formation of a metal silicide layer on the drain regions, respectively, whereby the leakage current of the MISFETs due to a voltage difference between the drain regions and wells can be reduced, and, thus, the power consumption can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.