Laterally diffused MOS transistor having N+ source contact to N-doped substrate

US7061057B2 · kind B2 · utility

Assignee

• Cree Microwave, LLC · US

Inventors

• Jeff Babcock · Sunnyvale, US
• Johan Darmawan · Cupertino, US
• John Mason · Sunnyvale, US

Key dates

• Filing date: Jun 16, 2004
• Grant date: Jun 13, 2006
• Expiry date: Jun 16, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.