Method of manufacturing a semiconductor device
US7073147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2003 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Oct 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Wirings connected to a gate electrode of a slave switch circuit cell for substrate bias circuits are respectively electrically connected to a wiring for a power supply potential and a wiring for a reference potential. Thus, the switch operation of the slave switch circuit cell is made invalid. Wirings connected to n wells of respective circuit cells are electrically connected to a wiring for the power supply potential, and wirings connected to p wells of the respective circuit cells are electrically connected to the wiring. Thus, the n wells are fixed to the power supply potential, and the p wells are fixed to the reference potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.