Socket assembly with incorporated memory structure
US7074050B1 · kind B1 · utility
14Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2005 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Nov 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R12/7076
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A socket assembly with incorporated memory structure is provided. A chip carrier socket assembly includes dual stage clamping actuation. A first clamping actuation stage provides clamping force for ball grid array (BGA) contact pads and a second clamping actuation stage provides clamping force for a thermal interface. The first clamping actuation stage provides clamping force proximate to a perimeter of a carrier where a plurality of BGA contact pads are located. The second clamping actuation stage provides clamping force generally centrally of the chip carrier socket assembly for thermal interface actuation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.