Inventor · Rochester, MN, US

Paul Eric Dahlen

58Patents
8h-index
31Co-inventors
78Inventor score

Filing activity: May 28, 1997 → Oct 10, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US7952478B2 Capacitance-based microchip exploitation detection Electricity 17 Active
US7342816B2 Daisy chainable memory chip Physics 17 Active
US7074050B1 Socket assembly with incorporated memory structure Electricity 14 Expired
US7884625B2 Capacitance structures for defeating microchip tampering Electricity 14 Active
US7989918B2 Implementing tamper evident and resistant detection through modulation of capacitance Electricity 10 Active
US7345900B2 Daisy chained memory system Physics 9 Active
US7838336B2 Method and structure for dispensing chip underfill through an opening in the chip Electricity 9 Active
US6224395A Flex cables with increased three-dimensional conformity and design flexibility Electricity 9 Expired
US7050871B2 Method and apparatus for implementing silicon wafer chip carrier passive devices Physics 8 Expired
US7088200B2 Method and structure to control common mode impedance in fan-out regions Electricity 8 Expired
US7345901B2 Computer system having daisy chained self timed memory chips Physics 7 Active
US6757175B1 Method and embedded bus bar structure for implementing power distribution Emerging Cross-Sectional Technologies 6 Expired
US9003559B2 Continuity check monitoring for microchip exploitation detection Physics 6 Active
US7701244B2 False connection for defeating microchip exploitation Electricity 6 Active
US7480201B2 Daisy chainable memory chip Physics 5 Active
US7723816B2 Implementing decoupling capacitors with hot-spot thermal reduction on integrated circuit chips Electricity 5 Active
US8079134B2 Method of enhancing on-chip inductance structure utilizing silicon through via technology Emerging Cross-Sectional Technologies 5 Active
US7202685B1 Embedded probe-enabling socket with integral probe structures Physics 4 Expired
US7667487B2 Techniques for providing switchable decoupling capacitors for an integrated circuit Physics 4 Active
US7675164B2 Method and structure for connecting, stacking, and cooling chips on a flexible carrier Electricity 4 Active
US7036710B1 Method and structures for implementing impedance-controlled coupled noise suppressor for differential interface solder column array Electricity 4 Expired
US7673093B2 Computer system having daisy chained memory chips Physics 4 Active
US7088199B2 Method and stiffener-embedded waveguide structure for implementing enhanced data transfer Electricity 3 Expired
US8174103B2 Enhanced architectural interconnect options enabled with flipped die on a multi-chip package Electricity 3 Active
US7954081B2 Implementing enhanced wiring capability for electronic laminate packages Electricity 3 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.