Darryl J. Becker
115Patents
9h-index
34Co-inventors
80Inventor score
Filing activity: Apr 5, 1993 → Mar 2, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5745344A | Heat dissipation apparatus and method for attaching a heat dissipation apparatus to an electronic device | Electricity | 46 | Expired |
| US5905636A | Heat dissipation apparatus and method for attaching a heat dissipation apparatus to an electronic device | Electricity | 42 | Expired |
| US6261404A | Heat dissipation apparatus and method for attaching a heat dissipation apparatus to an electronic device | Electricity | 27 | Expired |
| US7952478B2 | Capacitance-based microchip exploitation detection | Electricity | 17 | Active |
| US7342816B2 | Daisy chainable memory chip | Physics | 17 | Active |
| US7884625B2 | Capacitance structures for defeating microchip tampering | Electricity | 14 | Active |
| US7074050B1 | Socket assembly with incorporated memory structure | Electricity | 14 | Expired |
| US6993739B2 | Method, structure, and computer program product for implementing high frequency return current paths within electronic packages | Physics | 13 | Expired |
| US7345900B2 | Daisy chained memory system | Physics | 9 | Active |
| US5318212A | Method and apparatus for manufacturing a printed circuit card and connector assembly | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7838336B2 | Method and structure for dispensing chip underfill through an opening in the chip | Electricity | 9 | Active |
| US7088200B2 | Method and structure to control common mode impedance in fan-out regions | Electricity | 8 | Expired |
| US7050871B2 | Method and apparatus for implementing silicon wafer chip carrier passive devices | Physics | 8 | Expired |
| US7345901B2 | Computer system having daisy chained self timed memory chips | Physics | 7 | Active |
| US7272809B2 | Method, apparatus and computer program product for implementing enhanced high frequency return current paths utilizing decoupling capacitors in a package design | Electricity | 6 | Expired |
| US9003559B2 | Continuity check monitoring for microchip exploitation detection | Physics | 6 | Active |
| US9341670B2 | Residual material detection in backdrilled stubs | Emerging Cross-Sectional Technologies | 6 | Active |
| US7701244B2 | False connection for defeating microchip exploitation | Electricity | 6 | Active |
| US8823090B2 | Field-effect transistor and method of creating same | Electricity | 5 | Active |
| US9438606B1 | Environmental-based location monitoring | Electricity | 5 | Active |
| US7480201B2 | Daisy chainable memory chip | Physics | 5 | Active |
| US8079134B2 | Method of enhancing on-chip inductance structure utilizing silicon through via technology | Emerging Cross-Sectional Technologies | 5 | Active |
| US8466024B2 | Power domain controller with gated through silicon via having FET with horizontal channel | Electricity | 4 | Active |
| US10318462B2 | Secure crypto module including optical glass security layer | Electricity | 4 | Active |
| US9488690B2 | Residual material detection in backdrilled stubs | Emerging Cross-Sectional Technologies | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.