Method for making a semiconductor device having a high-k gate dielectric
US7074680B2 · kind B2 · utility
48Cited by
22References
20Claims
0Family size
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Key dates
| Filing date | Sep 7, 2004 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Sep 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate a gate dielectric with a graded dielectric constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.