Patent · US Expired

Self-aligned trench MOSFETs and methods for making the same

US7078296B2 · kind B2 · utility

53Cited by
293References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 16, 2002
Grant dateJul 18, 2006
Priority date
Expiry dateJan 16, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038

Abstract

Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOSFET is provided by making the sidewall of the overlying isolation dielectric layer substantially aligned with the sidewall of the gate conductor. Such an alignment can be made through any number of methods such as using a dual dielectric process, using a selective dielectric oxidation process, using a selective dielectric deposition process, or a spin-on-glass dielectric process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.