Selective fabrication of high capacitance density areas in a low dielectric constant material
US7109125B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2004 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Nov 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method for selective fabrication of high capacitance density areas in a low dielectric constant material and related structure are disclosed. In one embodiment, a first area of a dielectric layer is covered, for example with photoresist, while a second area of the dielectric layer is exposed to a dielectric conversion source such as E-beams, I-beams, oxygen plasma, or an appropriate chemical. The exposure causes the dielectric constant of the dielectric layer in the second area to increase. A number of capacitor trenches are etched in the second area of the dielectric. The capacitor trenches are then filled with an appropriate metal, such as copper, and a chemical mechanical polish is performed. The second area in which the capacitor trenches have been etched and filled has a higher capacitance density relative to the first area. In another embodiment, the exposure to the dielectric conversion source is not performed until after the chemical mechanical polish has been performed. In yet another embodiment, a blanket layer of metal, such as aluminum, is first deposited. The blanket layer of metal is then etched to form metal lines. Then a gap fill dielectric is utilized to fill the g…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.