MIM capacitor structure and method of fabrication
US7112507B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2003 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Dec 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/696
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a semiconductor device. At least one thin conductive material layer is disposed within the material of the metallization layer to reduce the surface roughness of the metallization layer, thus improving the reliability of the MIM capacitor. The thin conductive material layer may comprise TiN, TaN, or WN and may alternatively comprise a barrier layer disposed over or under the TiN, TaN, or WN. One plate of the MIM capacitor is patterned using the same mask that is used to pattern conductive lines in a metallization layer, thus reducing the number of masks that are required to manufacture the MIM capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.