Patent · US Expired

Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug

US7112528B2 · kind B2 · utility

9Cited by
34References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 13, 2003
Grant dateSep 26, 2006
Priority date
Expiry dateMar 1, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76879
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention generally provides a metallization process for forming a highly integrated interconnect. More particularly, the present invention provides a dual damascene interconnect module that incorporates selective chemical vapor deposition aluminum (CVD Al) via fill with a metal wire, preferably copper, formed within a barrier layer. The invention provides the advantages of having copper wires with lower resistivity (greater conductivity) and greater electromigration resistance than aluminum, a barrier layer between the copper wire and the surrounding dielectric material, void-free, sub-half micron selective CVD Al via plugs, and a reduced number of process steps to achieve such integration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.