Graded composition metal oxide tunnel barrier interpoly insulators
US7112841B2 · kind B2 · utility
59Cited by
102References
71Claims
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Key dates
| Filing date | Feb 18, 2004 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Feb 18, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0416
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and methods for programmable array type logic and/or memory devices with graded composition metal oxide tunnel barrier intergate insulators are provided. The programmable array type logic and/or memory devices include a floating gate transistor. The floating gate has a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposes the channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate and is separated from the floating gate by a compositionally graded mixed metal oxide tunnel barrier intergate insulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.