Semiconductor integrated circuit device having deposited layer for gate insulation
US7119406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2005 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Jul 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor integrated circuit device including a first field effect transistor having a gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate; and a second field effect transistor having a gate insulating film formed over a second element forming region of the main surface of the semiconductor substrate and made thinner than the gate insulating film of the first field effect transistor. The method comprises the steps of forming a thermally oxidized film over a first element forming region and a second element forming region of the main surface of the semiconductor substrate; forming a deposited film over the main surface of the semiconductor substrate including said thermally oxidized film; removing the deposited film and said thermally oxidized film from over the second element forming region; and forming a thermally oxidized film over the second element forming region to form a gate insulating film individually over the first element forming region and the second element forming region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.