Method, system and circuit for programming a non-volatile memory array
US7136304B2 · kind B2 · utility
46Cited by
109References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2003 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Nov 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3468
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a multi-phase method, circuit and system for programming non-volatile memory (“NVM”) cells in an NVM array. The present invention may include a controller to determine when, during a first programming phase, one or more NVM cells of a first set of cells reaches or exceeds to first intermediate voltage, and to cause a charge pump circuit to apply to a terminal of the one or more cells in the first set second phase programming pulses to induce relatively greater threshold voltage changes in cells having less stored charge than in cells having relatively more stored charge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.