Method of forming a field effect transistor with halo implant regions
US7153731B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2002 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Sep 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26533
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a field effect transistor includes forming a channel region within bulk semiconductive material of a semiconductor substrate. Source/drain regions are formed on opposing sides of the channel region. An insulative dielectric region is formed within the bulk semiconductive material proximately beneath at least one of the source/drain regions. A method of forming a field effect transistor includes providing a semiconductor-on-insulator substrate, said substrate comprising a layer of semiconductive material formed over a layer of insulative material. All of a portion of the semiconductive material layer and all of the insulative material layer directly beneath the portion are removed thereby creating a void in the semiconductive material layer and the insulative material layer. Semiconductive channel material is formed within the void. Opposing source/drain regions are provided laterally proximate the channel material. A gate is formed over the channel material. Integrated circuitry includes a bulk semiconductor substrate. A field effect transistor thereon includes a gate, a channel region in the bulk semiconductor substrate, and source/drain regions within the subs…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.