Forming gate oxides having multiple thicknesses
US7160771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2003 |
| Grant date | Jan 9, 2007 |
| Priority date | — |
| Expiry date | Jan 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0181
Abstract
Gate oxides having different thicknesses are formed on a semiconductor substrate by forming a first gate oxide on the top surface of the substrate, forming a sacrificial hard mask over a selected area of the first gate oxide; and then forming a second gate oxide. A first poly layer may be formed on the first gate oxide, under the hard mask. After the hard mask is removed, a second poly layer may be formed over the second gate oxide and over the first poly layer. This enables the use of high-k dielectric materials, and the first gate oxide can be thinner than the second gate oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.