Wafer-to-wafer alignments
US7193423B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2005 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Dec 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures for aligning wafers and methods for operating the same. The structure includes (a) a first semiconductor wafer including a first capacitive coupling structure, and (b) a second semiconductor wafer including a second capacitive coupling structure. The first and second semiconductor wafers are in direct physical contact with each other via a common surface. If the first and second semiconductor wafers are moved with respect to each other by a first displacement distance of 1 nm in a first direction while the first and second semiconductor wafers are in direct physical contact with each other via the common surface, then a change of at least 10−18 F in capacitance of a first capacitor comprising the first and second capacitive coupling structures results. The first direction is essentially parallel to the common surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.