Patent · US Expired

Nonvolatile memory cell having floating gate, control gate and separate erase gate, an array of such memory cells, and method of manufacturing

US7227217B2 · kind B2 · utility

7Cited by
20References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 28, 2005
Grant dateJun 5, 2007
Priority date
Expiry dateJul 29, 2025

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6892

Abstract

A nonvolatile memory cell having a floating gate for the storage of charges thereon has a control gate and a separate erase gate. The cell is programmed by hot channel electron injection and is erased by poly to poly Fowler-Nordheim tunneling. A method for making an array of unidirectional cells in a planar substrate, as well as an array of bidirectional cells in a substrate having a trench, is disclosed. An array of such cells and a method of making such an array is also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.