Bomy Chen
92Patents
22h-index
121Co-inventors
91Inventor score
Filing activity: Jul 22, 1994 → Sep 12, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6815704B1 | Phase change memory device employing thermally insulating voids | Electricity | 286 | Expired |
| US6937507B2 | Memory device and method of operating same | Physics | 247 | Expired |
| US6927410B2 | Memory device with discrete layers of phase change memory material | Electricity | 240 | Expired |
| US5675185A | Semiconductor structure incorporating thin film transistors with undoped cap oxide layers | Electricity | 86 | Expired |
| US7238959B2 | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same | Emerging Cross-Sectional Technologies | 85 | Expired |
| US7050316B1 | Differential non-volatile content addressable memory cell and array using phase changing resistor storage elements | Physics | 66 | Expired |
| US6806531B1 | Non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation | Electricity | 55 | Expired |
| US7307308B2 | Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation | Electricity | 54 | Expired |
| US6958273B2 | Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region, and a memory array made thereby | Electricity | 54 | Expired |
| US6287913A | Double polysilicon process for providing single chip high performance logic and compact embedded memory structure | Electricity | 53 | Expired |
| US7403418B2 | Word line voltage boosting circuit and a memory array incorporating same | Physics | 35 | Expired |
| US6022766A | Semiconductor structure incorporating thin film transistors, and methods for its manufacture | Electricity | 35 | Expired |
| US6294817A | Source/drain-on insulator (S/DOI) field effect transistor using oxidized amorphous silicon and method of fabrication | Electricity | 35 | Expired |
| US7012273B2 | Phase change memory device employing thermal-electrical contacts with narrowing electrical current paths | Electricity | 34 | Expired |
| US6504207B1 | Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same | Physics | 34 | Expired |
| US6429091B1 | Patterned buried insulator | Electricity | 30 | Expired |
| US5578854A | Vertical load resistor SRAM cell | Emerging Cross-Sectional Technologies | 26 | Expired |
| US6294449A | Self-aligned contact for closely spaced transistors | Electricity | 26 | Expired |
| US5538592A | Non-random sub-lithography vertical stack capacitor | Emerging Cross-Sectional Technologies | 26 | Expired |
| US6297127A | Self-aligned deep trench isolation to shallow trench isolation | Electricity | 23 | Expired |
| US6777260B1 | Method of making sub-lithographic sized contact holes | Electricity | 23 | Expired |
| US6544874B2 | Method for forming junction on insulator (JOI) structure | Electricity | 22 | Expired |
| US5665629A | Four transistor SRAM process | Electricity | 22 | Expired |
| US7598561B2 | NOR flash memory | Physics | 20 | Active |
| US7800159B2 | Array of contactless non-volatile memory cells | Electricity | 20 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.