Patent · US Expired

Memory module, test system and method for testing one or a plurality of memory modules

US7231562B2 · kind B2 · utility

145Cited by

11References

21Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Carsten Ohlhoff · Hersbruck, DE
Peter Beer · Waldshut-Tiengen, DE

Key dates

Filing date	Jan 9, 2004
Grant date	Jun 12, 2007
Priority date	—
Expiry date	Nov 14, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/2602
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to an integrated memory module having a memory unit and a self-test circuit, the self-test circuit being embodied in such a way as to make available test data and test addresses for testing memory areas in the memory unit and to generate defect data depending on the detection of a defect, a test circuit being provided in order to receive defect data from one or a plurality of connectable memory modules to be detected, the test circuit being configured in such a way as to store the received defect data depending on addresses assigned thereto in the memory unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.