Method of adding fabrication monitors to integrated circuit chips

US7240322B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• James W. Adkisson · Jericho, US
• Greg Bazan · South Burlington, US
• John M. Cohn · South Burlington, US
• Matthew S. Grady · Burlington, US
• Thomas G. Sopchak · Williston, US
• David P. Vallett · Saint Albans, US

Key dates

• Filing date: Apr 4, 2005
• Grant date: Jul 3, 2007
• Expiry date: Jul 27, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An integrated circuit, a method and a system for designing and a method fabricating the integrated circuit. The method including: (a) generating a photomask level design of an integrated circuit design of the integrated circuit, the photomask level design comprising a multiplicity of integrated circuit element shapes; (b) designating regions of the photomask level design between adjacent integrated circuit element shapes, the designated regions large enough to require placement of fill shapes between the adjacent integrated circuit elements based on fill shape rules, the fill shapes not required for the operation of the integrated circuit; and (c) placing one or more monitor structure shapes of a monitor structure in at least one of the designated regions, the monitor structure not required for the operation of the integrated circuit.