Patent · US Expired

Method for fabricating a semiconductor structure

US7259060B2 · kind B2 · utility

1Cited by

2References

10Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jurgen Amon · Dresden, DE
Jurgen Faul · Radebeul, DE
Johann Alsmeier · San Jose, US
Matthias Goldbach · Dresden, DE
Albrecht Kieslich · Radebeul, DE
Ralf Müller · Geringswalde, DE
Dirk Offenberg · Dresden, DE
Thomas Schuster · Ottenbach, DE

Key dates

Filing date	Nov 23, 2004
Grant date	Aug 21, 2007
Priority date	—
Expiry date	Sep 25, 2025

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/485
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method fabricates a semiconductor structure having a plurality of memory cells that are provided in a semiconductor substrate of a first conductivity type and contains a plurality of planar selection transistors and a corresponding plurality of storage capacitors connected thereto. The selection transistors have respective first and second active regions of a second conductivity type. The first active regions are connected to the storage capacitors and the second active regions are connected to respective bit lines, and respective gate stacks, which are provided above the semiconductor substrate in a manner insulated by a gate dielectric. In this case, a single-sided halo doping is effected, and an excessive outdiffusion of the halo doping zones is prevented by introduction of a diffusion-inhibiting species.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.