Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell

US7265376B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Andrew C. Graham · Sunnyvale, US
• Franz Hofmann · Munich, DE
• Wolfgang Hönlein · Unterhaching, DE
• Johannes Kretz · Birkenfeld, DE
• Franz Kreupl · Mountain View, US
• Erhard Landgraf · Dresden, DE
• Richard Luyken · Munich, DE
• Wolfgang Rosner · Hersbruck, DE
• Thomas Schulz · Austin, US
• Michael Specht · Munich, DE

Key dates

• Filing date: Oct 29, 2003
• Grant date: Sep 4, 2007
• Expiry date: Feb 19, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10K85/615
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A nonvolatile memory cell, memory cell arrangement, and method for production of a nonvolatile memory cell is disclosed. The nonvolatile memory cell includes a vertical field-effect transistor (FET). The FET contains a nanoelement arranged as a channel region and an electrically insulating layer. The electrically insulating layer at least partially surrounds the nanoelement and acts as a charge storage layer and as a gate-insulating layer. The electrically insulating layer is arranged such that electrical charge carriers may be selectively introduced into or removed from the electrically insulating layer and the electrical conductivity characteristics of the nanoelement may be influenced by the electrical charge carriers introduced into the electrically insulating layer.