DRAM cells

US7268382B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Shenlin Chen · Boise, US
• Trung T. Doan · Los Gatos, US
• Guy T. Blalock · Boise, US
• Lyle Breiner · Meridian, US
• Er-Xuan Ping · Boise, US

Key dates

• Filing date: Jun 7, 2006
• Grant date: Sep 11, 2007
• Expiry date: Jun 7, 2026

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/964

Abstract

The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is formed over the second semiconductor layer, and semiconductor-containing seeds are formed over the third semiconductor layer. The seeds are annealed to form the rugged semiconductor-containing surface. The first, second and third semiconductor layers are part of a common stack, and can be together utilized within a storage node of a capacitor construction. The invention also includes semiconductor structures comprising rugged surfaces. The rugged surfaces can be, for example, rugged silicon.