Stacked semiconductor packages
US7309913B2 · kind B2 · utility
52Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2004 |
| Grant date | Dec 18, 2007 |
| Priority date | — |
| Expiry date | Jan 27, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked semiconductor package includes a substrate and a first semiconductor device on the substrate. An interposer is supported above the first semiconductor device opposite the substrate. The interposer is electrically connected to the substrate. A second semiconductor device is mounted on the interposer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.