Capacitor structures, and DRAM arrays
US7321149B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2005 |
| Grant date | Jan 22, 2008 |
| Priority date | — |
| Expiry date | Nov 16, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/946
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A patterned mask can be formed as follows. A first patterned photoresist is formed over a masking layer and utilized during a first etch into the masking layer. The first etch extends to a depth in the masking layer that is less than entirely through the masking layer. A second patterned photoresist is subsequently formed over the masking layer and utilized during a second etch into the masking layer. The combined first and second etches form openings extending entirely through the masking layer and thus form the masking layer into the patterned mask. The patterned mask can be utilized to form a pattern in a substrate underlying the mask. The pattern formed in the substrate can correspond to an array of capacitor container openings. Capacitor structure can be formed within the openings. The capacitor structures can be incorporated within a DRAM array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.