SONOS memory cells and arrays and method of forming the same
US7323388B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 4, 2005 |
| Grant date | Jan 29, 2008 |
| Priority date | — |
| Expiry date | Jan 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A trench (2) is fabricated in a silicon body (1). The walls (4) of the trench are provided with a nitrogen implantation (6). An oxide layer between the source/drain regions (5) and a word line applied on the top side grows to a greater thickness than a lower oxide layer of an ONO storage layer fabricated as gate dielectric at the trench wall. Instead of the nitrogen implantation into the trench walls, it is possible to fabricate a metal silicide layer on the top sides of the source/drain regions in order to accelerate the oxide growth there.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.