Methods for fabricating a semiconductor device, which include selectively depositing an electrically conductive material
US7329582B1 · kind B1 · utility
3Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2005 |
| Grant date | Feb 12, 2008 |
| Priority date | — |
| Expiry date | Jun 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for fabricating a semiconductor device having an impurity doped region in a silicon substrate. The method comprises forming a metal silicide layer electrically contacting the impurity doped region and depositing a conductive layer overlying and electrically contacting the metal silicide layer. A dielectric layer is deposited overlying the conductive layer and an opening is etched through the dielectric layer to expose a portion of the conductive layer. A conductive material is selectively deposited to fill the opening and to electrically contact the impurity doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.