Methods of forming semiconductor constructions
US7341909B2 · kind B2 · utility
25Cited by
0References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2005 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Mar 30, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.