Patent · US Expired

Methods for generating a reference voltage and for reading a memory cell and circuit configurations implementing the methods

US7342819B2 · kind B2 · utility

6Cited by

5References

26Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Corvin Liaw · Birkenfeld, DE
Heinz Hoenigschmid · Starnberg, DE
Milena Dimitrova · Unterhaching, DE
Michael Angerbauer · Freutsmoos, DE

Key dates

Filing date	Mar 3, 2006
Grant date	Mar 11, 2008
Priority date	—
Expiry date	Mar 3, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C2013/0054
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and a circuit configuration for generating a reference voltage in a resistive semiconductor memory includes generating a reference voltage by connecting together two bitlines having different voltages. This method for generating a reference voltage can be used in a method and in a circuit configuration for reading at least one memory cell of a resistive memory cell array in a semiconductor memory. The generated reference voltage and a voltage dependent on the content of a resistive memory cell are applied to an amplifier to determine the content of the memory cell. The content of the memory cell is determined dependent on a relationship between the reference voltage and the voltage dependent on the content of the memory cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.