Patent · US Active

Trench buried bit line memory devices and methods thereof

US7365384B2 · kind B2 · utility

22Cited by
22References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 27, 2006
Grant dateApr 29, 2008
Priority date
Expiry dateOct 27, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/485

Abstract

A memory device includes isolation trenches that are formed generally parallel to and along associated strips of active area. A conductive bit line is recessed within each isolation trench such that the uppermost surface of the bit line is recessed below the uppermost surface of the base substrate. A bit line contact strap electrically couples the bit line to the active area both along a vertical dimension of the bit line strap and along a horizontal dimension across the uppermost surface of the base substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.