Inventor · Boise, ID, US

Mark Durcan

20Patents
9h-index
12Co-inventors
68Inventor score

Filing activity: May 8, 1997 → Oct 27, 2006

Most-cited inventions

PatentTitleAreaCited byStatus
US6310366A Retrograde well structure for a CMOS imager Electricity 221 Expired
US6331488A Planarization process for semiconductor substrates Electricity 112 Expired
US6734482B1 Trench buried bit line memory devices Electricity 72 Expired
US6806137B2 Trench buried bit line memory devices and methods thereof Electricity 51 Expired
US7365384B2 Trench buried bit line memory devices and methods thereof Electricity 22 Active
US6445014B1 Retrograde well structure for a CMOS imager Electricity 21 Expired
US6787819B2 Retrograde well structure for a CMOS imager Electricity 14 Expired
US6483129B2 Retrograde well structure for a CMOS imager Electricity 13 Expired
US6100162A Method of forming a circuitry isolation region within a semiconductive wafer Electricity 12 Expired
US6340624B1 Method of forming a circuitry isolation region within a semiconductive wafer Electricity 9 Expired
US6686220B2 Retrograde well structure for a CMOS imager Electricity 8 Expired
US6274928A Single deposition layer metal dynamic random access memory Electricity 6 Expired
US6858460B2 Retrograde well structure for a CMOS imager Electricity 6 Expired
US6743724B2 Planarization process for semiconductor substrates Electricity 4 Expired
US7170124B2 Trench buried bit line memory devices and methods thereof Electricity 1 Expired
US6333264A Semiconductor processing method using high pressure liquid media treatment Electricity 0 Expired
US6417102B1 Semiconductor processing method using high pressure liquid media treatment Electricity 0 Expired
US7619672B2 Retrograde well structure for a CMOS imager Electricity 0 Active
US6995059B2 Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions Electricity 0 Expired
US6599800B2 Methods of forming capacitors, and methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions Electricity 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.