ROM redundancy in ROM embedded DRAM
US7366946B2 · kind B2 · utility
8Cited by
35References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2007 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Feb 6, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.