Methods for designing carrier substrates with raised terminals
US7368391B2 · kind B2 · utility
5Cited by
25References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Aug 29, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for designing a carrier substrate includes configuring at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent adhesive material from contaminating connection surfaces thereof. The method may also include configuring the carrier substrate to include one or more recessed areas that laterally surround at least a portion of the die-attach location to receive excess adhesive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.