Structure and method for thermally stressing or testing a semiconductor device
US7375371B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2006 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Dec 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2856
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A structure is provided which includes at least one semiconductor device and a diffusion heater in a continuous active semiconductor area of a substrate. One or more semiconductor devices are provided in a first region of the active semiconductor area and a diffusion heater is disposed adjacent thereto which consists essentially of a semiconductor material included in the active semiconductor area. Conductive isolation between the first region and the diffusion heater is achieved through use of a separating gate. The separating gate overlies an intermediate region of the active semiconductor area between the first region and the diffusion heater and the separating gate is biasable to conductively isolate the first region from the diffusion heater.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.