Method for manufacturing a memory device having a nanocrystal charge storage region
US7378310B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 27, 2005 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Mar 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. A layer of metal oxide having a first heat of formation is formed on the first layer of dielectric material. A metal layer having a second heat of formation is formed on the metal oxide layer. The second heat of formation is greater than the first heat of formation. The metal oxide layer and the metal layer are annealed which causes the metal layer to reduce the metal oxide layer to metallic form, which then agglomerates to form metal islands. The metal layer becomes oxidized thereby embedding the metal islands within an oxide layer to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.