Patent · US Expired

High density interconnect system having rapid fabrication cycle

US7382142B2 · kind B2 · utility

35Cited by
287References
29Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 18, 2005
Grant dateJun 3, 2008
Priority date
Expiry dateAug 20, 2025

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49222
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.