Erase operation for use in non-volatile memory
US7403430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2006 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Jan 28, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sector erase method for use in a non-volatile memory, such as a FLASH memory, including a plurality of memory cells in rows and columns, the memory cells being divided into a plurality of sectors. The sector erase method includes erasing the memory cells of a first sector by applying successive erase pulses that increase in voltage magnitude or pulse width, until erasure of the first sector is verified. Erase condition information corresponding to the first sector, is recorded, this information including a number of times successive erase pulses are needed to be applied in order to erase the memory cells of the first sector. Memory cells of a next sector are erased by applying a first erase pulse having a voltage magnitude or pulse width determined from the recorded erase condition information. The first erase pulse may be incremented if the first erase pulse fails to erase that next sector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.