Method of reducing contamination by removing an interlayer dielectric from the substrate edge
US7410885B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Dec 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76843
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By performing at least one additional wet chemical etch process in the edge region and in particular on the bevel of a substrate during the formation of a metallization layer, the dielectric material, especially the low-k dielectric material, may be reliably removed from the bevel prior to the formation of any barrier and metal layers. Moreover, an additional wet chemical etch process may be performed after the deposition of the metal to remove any unwanted metal and barrier material from the edge region and the bevel. Accordingly, defect issues and contamination of substrates and process tools may be efficiently reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.