CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure
US7419867B2 · kind B2 · utility
2Cited by
5References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 16, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Jun 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By predoping of a layer of deposited semiconductor gate material by incorporating dopants during the deposition process, a high uniformity of the dopant distribution may be achieved in the gate electrodes of CMOS devices subsequently formed in the layer of gate material. The improved uniformity of the dopant distribution results in reduced gate depletion and reduced threshold voltage shift in the transistors of the CMOS devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.